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SiRFstarII Architecture

The SiRFstarII architecture builds on the high-performance SiRFstarI core and adds significant enhancements by integrating fast acquisition and satellite signal tracking engines, a differential GPS processor, and multipath mitigation hardware. The first chip set family, the SiRFstarIIe, is aimed at applications such as personal locators or marine handheld devices, in which GPS is the main focus.

SiRFstarII features:
  • High-performance GPS core
  • Integrated ARM CPU and on-chip memory
  • Significant throughput for user applications
  • Extensive peripheral support
  • Enables a GPS receiver to be the size of a postage stamp

The SiRFstarII family consists of the SiRFstarIIe/LP and the SiRFstarIIt. The GPS tracking engine is also available as a complete IP package.